Embodiments relate to a master capable of communicating data with a slave via a bus, and more particularly, to a master for increasing data transmission efficiency by transmitting only data needed to be updated to a slave via a bus when writing data to the slave via the bus and a data processing system including the master.
With the recent trend of compactness, high-performance, multifunction and convergence of digital electronic devices, a system on chip (SoC) in which multiple systems performing different functions are integrated in a single system is commonly used. Shortening time for research and development of SoC design enables faster responses to rapidly changing market demand. For this reason, recycling of a system block, i.e. an intellectual property (IP) block used in conventional design has been increased. Recycling of an IP block is effective in reducing the time for product development and but also in enhancing the reliability of a newly developed SoC.
In addition, selection of a bus system used for communication between IP blocks integrated in one chip may be part of effective design of a SoC. Transmission and reception of data in a bus system may be performed according to a predetermined protocol of the bus system.
Advanced microcontroller bus architecture (AMBA®) of Advanced RISC Machine (ARM), one of representative bus systems used widely, involves various protocols. For instance, AMBA includes an advanced high-performance bus (AHB) which connects high-speed IP blocks, advanced extensible interface (AXI), and an advanced peripheral bus (APB) which connects low-speed IP blocks.